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Home arrow Wafer Processing arrow Articles arrow Edition 20 - Published November 2003 arrow 20th Edition: Process optimizatio...
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20th Edition: Process optimization – the key to obtain highly reliable Cu interconnects Print E-mail
Oct 31, 2003 at 12:00 AM

A.H. Fischer, A. von Glasow, S. Penka & F. Ungar, Reliability Methodology, Infineon Technologies AG,
Munich, Germany

ABSTRACT

Electromigration (EM) and stressvoiding (SV) are critical wear-out mechanisms in copper metallizations, limiting the lifetime of complex interconnect systems [1–3]. As the trend goes to higher currents and operation temperatures, it is a great challenge for process integration to obtain highly reliable interconnects that are operable, e.g. at 6 mA/μm2 and 125°C for more than 10 y, tolerating only “few ppm” failures. The key to meet such targets is the optimization of single processes that yield appropriate microstructural properties of the copper and adequate interfaces along the liner or the cap layer. This paper will focus on process-related influences on the EM and SV behavior, where three categories are distinguished: Processes that influence local properties of the copper or liner at the via-to-line transition (I), that change the grain structure of copper (II), that change interface properties between Cu and cap layer (III).

20th Edition: Process optimization – the key to obtain highly reliable Cu interconnects
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