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Product Briefing Outline: Xyalis has launched its GTmask suite, which, it is claimed, is a fully integrated mask date prep solution dedicated to complex wafer masks. Based on Xyalis’ existing tools, GTmask offers new capabilities fully meeting mask teams’ demands, covering wafer assembly and floor-planning for chip arrays, multi-project wafers and multi-layer reticles; CMP metal filling; automatic frame generation; and optimized GDSII and jobdeck files generation. The GTmask tool suite is part of Xyalis’ product strategy aiming at establishing direct links between process data management tools and SQL-based administration databases.

Problem: As process geometries are shrinking, mask data preparation (MDP) complexity is soaring as well as databases sizes, threatening to add extra delays into the design for manufacture (DFM) flow. Adding to the MDP flow complexity, multi-project wafers (MPWs) and multi-layer reticles (MLRs) services are now provided by foundries to reduce mask costs. Xyalis (Grenoble, France) is the only independent company offering to mask assembly teams a full line of tools solving these issues.

Solution: Xyalis’ high end assembly tool handles the complete set of mask layers of a chip; OASIS layers as well as GDSII layers; multi-project wafers (assembling multiple GDSII/OASIS databases from different designs on one wafer); any scale reticles (2.5X, 4X, 5X); and multi-layer reticles (placing different layers of a same design onto a single reticle, with automatic matricing). Added to the wafer map management tool, new multi-criteria placement optimizations allow the user depending on his current needs, to maximize the number of dies and/or to minimize the number of shots. A manual fine tuning capability helps to handle the frame and chip stepping, dynamically computing the number of dies and photos. A graphic wafer description tool gives the user full control of relevant parameters (notch, flat size & position, unusable perimeter, forbidden areas…). Functions like chip grouping, and automatic removal and query of chips and frames, help enhance the user’s productivity. To increase manufacturability regarding the CMP step, an option to fill empty spaces with dummy tiles is also available. Dummy cells are customizable, as are insertion rules. Dummy cells come as single OASIS/GDSII files, or as multiple files with jobdeck files (placement directives for mask writing tools).
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Applications: Wafer assembly and floor planning for chip arrays, multi-project wafers and multi-layer reticles.

Platform: The new GTframe module automatically inserts process and mask-specific items (test structures, alignment marks or any GDSII files), for both regular chip arrays and MPWs. Automatic frame instantiation is also available for reticles, with the possibility to use mask templates. Barcodes or titles are also inserted into the scribe lines, between the chips of an MPW project or around the reticles. Xyalis tools now handle both classical GDSII and newer OASIS chip layout database formats. The GTmask tool suite is also able to read and write files in the MEBES mask-writing format. This makes it easy to include GTmask into existing flows. One of the key benefits of the GTmask tool suite is the safe handling of large databases, including process description, imported and merged GDSII databases validation, and layer management for complex MPWs and MLRs. The next step will be to establish a direct link with SQL databases for mask management and ordering applications.

Availability: May 2008 onwards.