The Churchill Hotel may not be the newest or trendiest hotel in Washington, DC, but it does have a certain air of old-school class, making it a fitting site for Chipworks' Dick James now-becoming-annual (and always entertaining) "Ongoing History of Strain" invite-only presentation at IEDM.
While the attention of the standing-room-only crowd may have been riveted on the reverse-engineering analyses of Intel's overballyhooed 45-nm devices, another company stole a bit of the Otellini Gang's thunder with a chip that Dick said beat the Xeon to market by 11 days: an IC found in Matsushita's UniPhier system-on-chip package, which the Chipworks lab rats ripped out of a Panasonic Blu-Ray DVD recorder.
First, a look back at Matsushita's one-time latest and greatest---from two years' ago or so. As Dick explained at the reception (and expanded on in a follow-up email to Chip Shots), for the 65-nm generation, "Matsushita claimed to jump straight from 130 nm to 65 nm. The transistor appears to be a shrink from 130 nm, with no use of strain. Advanced litho allows closer contact spacing, giving an SRAM size of 0.57 square microns versus Intel's 0.62 square microns" at the same half-pitch.
Dick noted sources that said the chip was produced at Matsushita's 300-mm fab in Uozu City, and that "the part features a transistor gate length of 55 nm [said gates = nickel silicide], which is consistent with that found by Chipworks," although this length is a bit longer than that indicated by the International Technology Roadmap for Semiconductors. (As for the ubiquitous industry roadmap, "we hardly ever see anything that agrees with the ITRS," Dick joked.)
He cited a Nikkei Electronics Asia report that says that Matsushita chose the longer gate length to reduce power dissipation. "The narrow gate pitch, needed for higher integration, was then achieved by manufacturing fine 80-nm contact holes. This was accomplished with a proprietary ultraresolution technology, which controls optical phase, intensity, and other parameters, to boost exposure resolution. The result was a reduction in dissipation to between two-fifths and two-thirds of the 90-nm generation chips, coupled with about double the integration level."
The Matsushita 65-nm chip was made with an eight-metal, twin-well process on a P-type substrate, according to Dick, using dual-damascene copper, tantalum-nitride liners on metal-2 through metal-7, with a single-damascene metal-1 layer. A top aluminum metal-8 is employed to form the bond pads. Fluorosilicate glass comprised interlayer-dielectric layers 5 and 6, while ILD-4 through ILD-1 used low-k carbon-doped dielectrics.
Behold Matsushita's 45-nm device. (TEMphoto courtesy of Chipworks)
Enough about the 65-nm Matsushita chip: what about its new 45-nm device? Although the level of detail presented was not quite up to that of the earlier-generation IC, Chipworks found evidence of the Japanese engineers using strain-induced, mobility enhancement techniques on the stack---something not seen in the 65-nm cousin---including an unusually thin 10-15 nm nitride contact-etch stop layer. Still, in many respects the new chip looks like it's "essentially a shrink of the 65-nm process" (cost being the main driver), Dick noted, "although there is a change to the <100> channel orientation." The gate length--- about 30 nm---is the smallest that the Chipworks crew has seen in a production part, although the gate-oxide thickness remains steady at 1.7 nm. Nickel silicide remains the gate material of choice, with the spacing shrinking down to about 35 nm.
Dick told me later at IEDM that so far, Chipworks has not found another 45-nm production chip on the open market, although there's talk of IBM's not showing up until later in 2008, possibly lurking inside expensive server boxes---an end-product somewhat outside the Canadian company's limited sample-procurement budget. Cellphones, iPods and DVD players are one thing to buy at Fry's and tear down, but a blade server is a whole 'nother pricey kettle of fish!)
But for now, the side-by-side comparison of Matsushita's and Intel's leading-edge ICs shows the Japanese holding their own, at least according to Chipworks' "we see what we see/we can't see everything we want to see/ sometimes we don't know what we see" advanced process analysis.
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