Product Briefing Outline: Tokyo Electron Limited
announced the introduction of the ‘CELLESTA+,’ TEL’s newest 300mm
single wafer cleaning system targeting FEOL critical cleans, advanced
gate, and surface preparations for 90nm technologies, down to 45nm and
beyond. Offering high productivity and optimal performance, the
CELLESTA+ represents TEL’s continuous investment in advanced surface
preparation technology.
Problem: The CELLESTA+ provides two key features
that tackle next generation critical cleaning applications. First,
TEL's original IPA drying technology is designed to eliminate the
generation of watermarks caused by HF-last processes and pattern
collapse damage that is typically associated with surface tension
gradient drying techniques on high aspect ratio features, such as DRAM
capacitors. Second, CELLESTA+ employs an enhanced atomized spray (AS3),
which provides a large process window for high particle removal
efficiency (PRE) with no pattern or surface structure damage, according
to the company.
Solution: Based on TEL’s
market-leading coater/developer CLEAN TRACK LITHIUS Pro platform, the
CELLESTA+ delivers high reliability, process performance and throughput
for the most advanced critical cleans for the 45nm technology node and
beyond. The advanced single wafer cleaning system has a 12-process spin
chamber configuration, enabling a throughput of 333 wafers per hour.
The system also includes two important features to reduce overall
system footprint and maximize performance: a new compact spin unit
design and onboard chemical supply.
Applications:
FEOL resist strip, post ash cleans, FEOL surface preparation, Dilute
surface cleans (Single-Pass Chemistry), SC1, SC2, HF and oxide etch.
Platform:
The CELLESTA platform also comes with TEL’s Vapor Ozone Strip process
chamber (SVOS) for resist removal and a wet spin chamber for FEOL
surface preparations using SC1, SC2, and HF chemistries.
Availability: December 2007 onwards.