If we are to believe recent comments from Intel's boss Paul Otellini, the Moore's Law juggernaut almost rolled off the tracks at the 45-nm station, were it not for some hafnium-enabled innovational intervention.
"I'm not sure everyone has paused to think about the impact of our reinvented transistors," Otellini told CRN.
"It's not an exaggeration to say that we were heading toward a premature end to Moore's Law [emphasis added] and thus the pace of innovation everyone has come to expect from Intel and from our high-technology industry."
Intel's latest product launch includes 16 souped-up server and PC processors in its new Penguin, er, Penryn family, which are the first to benefit from the company's hafnium-based high-k dielectric/metal gate (HKMG) process technology. The high-performance chips pack nearly twice as many transistors as their 65-nm predecessors, can enable devices using less silicon real estate, run cooler, perform more efficiently, will bring about world peace, etc.---you know the story.
Turns out the whole 45-nm rollout over the past few months has coincided with Intel's embrace of YouTube, where you can now view a slew of infotainment videos singing (literally, in some cases) the praises of the Intellian Dominance Paradigm, including a new goofy one riffing on--and taking liberties with---the old Bobby Fuller tune (also covered raucously by the Clash), "I Fought the Law (and the Law Won)." As one might suspect, the "law" is the one Gordon Moore created, while "hafnium" appears for what might be the first time in a song lyric. Eventually, will we hear "hafnium" rhymed with "ruthenium" in some hip-hop parody of CMOS at the brink?
Those wanting a taste of the technological details behind Intel's HKMG should check out a couple of papers slated for the upcoming IEEE International Electron Devices Meeting (better known as IEDM), taking place Dec. 10-12 in Washington, DC. Tuesday morning's Session 10, "Integrated Circuits and Manufacturing---Advanced CMOS Logic and SoC," features the long-awaited presentation from Intel. Coauthored by no fewer than 50 geeks from Otellini's crew, the paper's title is a verb-less mouthful: "A 45-nm Logic Technology with High-K and Metal Gate Transistors, Strained Silicon, Nine Copper Interconnect Layers, 193-nm Dry Patterning, and 100% Pb-Free Packaging."
One of those HKMG Gang of 50, K.J. Kuhn, also has a related (sort of) talk on Tuesday afternoon in Session 18, "CMOS Devices---Device/Design Integration." His paper deals with an increasingly problematic advanced chipmaking bugaboo--- process variability; its title is "Reducing Variation in Advanced Logic Technologies Approaches to Process and Design Manufacturability of Nanoscale CMOS."
Interestingly, the two aforementioned papers are just about the only presentations that Intel will be making at this year's IEDM. If you want to find out who else will be sharing their latest and greatest at the conference or want to register and attend, click here.
Postscript: Just noticed that my blogger-in-arms, Fabtech editor Mark Osborne, posted his own musings on Intel's 45-nm shenanigans, so check out his mention of Chipworks' revealing (or soon-to-be-revealed) Penryn teardown while you're visiting this site.
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Comment by GUEST on 2007-11-15 11:52:15
Tom Cheyney replies: My apologies to Kelly for the gender confusion. I look forward to hearing her presentation at IEDM and apologizing to her in person. | Comment by GUEST on 2007-11-15 11:52:25
Conclusion of these musings is.. AMD hype machine running out of gas | Comment by GUEST on 2007-11-19 10:30:32
Without innovation, the industry is always heading toward a "premature end to Moore's law". Intel overhypes something that's been on the ITRS roadmap for years. Lame. | Comment by GUEST on 2007-11-14 09:28:45
K.J. Kuhn is a woman, she goes by Kelly... and she is quite brilliant. |
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| Regional Sales Director Europe (m/f) - Analog ICs (Munich, 08/04/2008) | | Senior Technical Program Manager (Dublin, Ireland, 02/04/2008) | | Senior Embedded Design Support Engineer (Shannon, Co Clare, Ireland, 19/03/2008) | | Embedded Support Engineer (Intel Shannon, Co Clare, Ireland, 19/03/2008) | | Senior Component Design Engineer (Intel Shannon, Co Clare, Ireland, 19/03/2008) |
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