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Home arrow Blogs arrow Chip Shots arrow Blogs arrow AMD's Grose tells ISMI attendees to get smart (AKA lean) with next-gen ch...
AMD's Grose tells ISMI attendees to get smart (AKA lean) with next-gen chip fabs Print E-mail
Oct 24, 2007 at 12:56 PM
When Doug Grose says chipmakers need to learn to manufacture "smart," what he really means is "lean." In his keynote presentation on the opening day of the fourth annual ISMI Symposium on Manufacturing Effectiveness in Austin, the AMD senior VP offered what he called a "call to action" for next-generation semiconductor factories. "You have to question what has brought us here, how that might be holding us back, and place some very smart bets moving forward."

Grose pulled heavily from AMD's own experiences in getting smart, including its much-ballyhooed automated precision manufacturing (APM, one letter off from the mothership's initials). During the Q&A following his talk, he emphasized that AMD uses "APM to get every ounce of efficiency out of the silicon" (or silicon on insulator, as the case may be). Certainly, the souped-up advanced process/equipment/factory control strategy has become a benchmark against which other companies measure the smartness of their own factories---and has played a critical role in helping AMD stay in business.

He also championed the cause of collaboration, noting how working with partners across the supply chain creates "a multiplying effect of what collaboration can bring." He cited AMD and IBM "collaborating for efficiency" in a number of technological areas, such as immersion litho, strained silicon (80% p-channel drive current improvement! 24% n-channel drive improvement!), low-k dielectrics (15% reduction in wire delays!), and high-k metal gates (20% performance pop!).

Then Grose got all lean on the crowd. In fact, he transformed lean from an adjective into a noun right before our ears. He said that "lean is the defining characteristic of the next-generation factory (NGF, for those stirring the acronym/initialism alphabet soup). The "primary focus of lean is reducing cycle time," he proclaimed. How do you bring those CTs down? Go to all single-wafer processing and smaller lot sizes, and then "substantial CT reductions are achievable."

AMD is implementing lean across the board, shooting for at least a 50% downtick in CTs and 0.7 days per mask level. The Dresden fabs are hitting about 1 day per mask level, so they're making good progress. Since February 2005, fab floor results show some pretty impressive increases in efficiency and decreases in CTs. In terms of capacity, wafer starts per week have jumped 31%, while labor productivity (monthly activities per operator) has climbed 72%. Monthly wafer costs have dropped 26%, and the aforementioned cycle time per mask layer has been trimmed 23%.

Grose's call-to-action list read like an overall factory effectiveness primer. Rethink your batch sizes (smaller usually better), put more emphasis on scheduling (really know the wheres and whens of your whatsits), increase equipment changeability (get flexible with those systems), create minibatch processing tools (opportunity for OEMs?), improve tool predictability and reduce variability (getting closer to the sublimeness of the straight and narrow), shift the supply chain to accommodate lean delivery (good-bye Byzantium, hello efficiency!), and reduce total cycle time and wafer waiting (whip that WIP into shape)---from stem to stern.

While seeming to succumb to the eventuality of a 450-mm wafer-size transition, Grose didn't appear to be in any hurry to go there just yet. "Don't abandon 300 mm. We have to reap more returns on our investments from 300. We have to use lean to improve efficiencies and improve our current methods.... The investment will continue paying dividends at 450."

With some of the cost projections for 450-mm equipment and fabs, I don't see much lean there. What's lean about a $100 million-plus EUV lithography tool (if you can get it to work) or a $8 billion-$10 billion fab (if you are one of the few who can "afford" to build one)? If the R&D price tag for 300-mm rests somewhere north of $6 billion, how lean will it be to cover the 450-mm nut, and which lean and mean corporate machines are going to foot the bill?

In the case of the big-pizza-pie wafers, "efficient" and "lean" may not be synonymous. Whether it's the smart move for the industry remains to be seen.
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