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Spansion to use MirrorBit to 65nm node |
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Feb 04, 2005 at 03:00 AM |
Spansion LLC, has laid out an ambitious three-year vision and strategic
road map, outlining plans to scale its MirrorBit(TM) technology to
8-gigabit densities on 65nm lithography to meet the growing demands of
the entire Flash market.
Spansion's newly announced product road map is expected to extend the
reach of MirrorBit technology to encompass the complete range of
densities, performance, cost and reliability required by the overall
Flash memory market. Spansion plans to sample the industry's first 90nm
1-gigabit NOR device and new mass data storage products for mobile
phones(1) in early 2005. With further scaling to 8-gigabits by 2007,
the company's MirrorBit product line is expected to eventually include
the complete range of densities and solutions required by Spansion
customers.
"Now that Spansion has been able to solve some of the inherent scaling
and performance problems with nitride-based technology, its new
'ORNAND' architecture is truly a breakthrough," said Alan Niebel, CEO
and founder of semiconductor market analysis firm Web-Feet Research.
The company has also demonstrated MirrorBit technology's ability to
quadruple densities with a working proofof- concept "QuadBit" test chip
in its Submicron Development Center. In addition, Spansion has a
working test chip prototype based on 65nm MirrorBit technology.
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