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Soitec and AS International fabricate 300-mm strained SOI substrates |
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Feb 04, 2005 at 08:00 PM |
Soitec and ASM International have produced samples of the industry's
first industrially manufactured 300-mm sSOI wafers. The wafer
substrates where showcased at the Soitec booth at this year's SEMICON
Japan show, held in early December. Soitec and ASM report that the
quality of the 300-mm sSOI wafers corresponds very closely to that
achieved on 200mm wafers.
The sSOI wafers exhibit a strain value of 1.5 Giga Pascal (GPa) with
homogeneity of +/-7 percent over the wafer. The recorded strain
corresponds to a silicon lattice deformation of almost 1 percent. The
strained silicon layer thickness is 200 angstroms (A) with homogeneity
of +/-3 percent and a surface roughness comparable to that of premium
bulk silicon wafers. According to Soitec, sSOI wafers maintain their
strain at temperatures up to 1100 degrees Celsius, offering a process
window sufficient to accommodate CMOS integration thermal budgets.
"The successful production of 300-mm sSOI wafer samples takes this
project beyond R&D evaluation and into the next phase of
industrialization, enabling Soitec to make these wafers available for
developing ICs at the 45-nm technology node," said Carlos Mazure,
Soitec's chief technology officer. "This latest milestone emphasizes
our ability to focus on developing, in an extremely hort period of
time, engineered substrates that meet the stringent requirements of
future technology nodes in 300mm."
The initial 300-mm wafers are thin-film sSOI for fully depleted (FD)
architectures; thicker-film sSOI wafers for partially depleted (PD)
architectures will begin sampling during the first quarter of 2005.
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