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Freescale and TSMC in 65nm SOI joint development |
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Feb 04, 2005 at 07:00 PM |
Freescale Semiconductor, and Taiwan Semiconductor Manufacturing Company
(TSMC) have signed an agreement to jointly develop a new generation of
silicon-on-insulator (SOI) high-performance transistor front-end
technology targeted for the 65nm CMOS process node. The three-year
agreement also provides TSMC with manufacturing rights to Freescale's
90-nm silicon-on-insulator (SOI) technology.
TSMC and Freescale have been developing SOI technology independently
for a number of years. Freescale has developed three generations of SOI
technology since the mid-1980s. The company has shipped more than 7
million SOI-enabled products since it started production in 2001,
according to the compan.
Freescale is currently establishing a 90-nm CMOS SOI manufacturing
platform in its Dan Noble Center facilities in Austin, Texas, USA, for
next-generation high performance networking and computing products.
TSMC has been independently developing SOI technology starting from
0.13um technology node since the late 1990s.
The collaboration is expected to enable faster time to market of 65-nm
SOI technology for innovative applications in a variety of markets.
During the joint development of the 65-nm SOI highperformance
transistor front-end technology, the two companies are expected to
develop independently their own 65-nm metallization back-end technology
tailored to their specific market applications. Freescale will apply
the overall technology to 65-nm SOI chips at 300mm in the Crolles2
joint R&D and pilot manufacturing facility in France, which it
shares with Philips and STMicroelectronics. TSMC may apply the
technology in its Taiwan facilities, with a high-speed version that
targets performancedriven applications in networking and computing and
a lowpower version for handheld and portable applications.
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