By Dr. Jagdish Prasad, AMI Semiconductor

ABSTRACT

As the physical and electrical limits of SiO₂ are approached, new materials and device architectures will be introduced to ensure adherence to Moore’s curve. These new materials and device architectures will most likely be introduced at 45nm and will continue to 32nm and beyond. Ni-based fully silicided (Ni-FUSI) with HfSiON CMOS shows promise at 45nm, while new architectures such as FinFET at 32nm will also be used. Introduction of high-k gate dielectric and metal gates will change the wafer cleaning process dramatically. Conventional RCA clean that contains hydrogen peroxide (H₂O₂) as one of the three components may no longer be used since hydrogen peroxide is known to dissolve metals, thus making it unsuitable for metal gates. The RCA process chemistry has many advantages such as excellent particle and metal removal capabilities. These advantages of RCA clean will be lost and will pose new challenges. Furthermore, drying high aspect ratio (>30:1) will be a challenge. Achieving complete drying of these challenging high aspect ratio structures at 45nm and beyond will require interface engineering.