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At the 2008 IEEE International SOI Conference, Innovative Silicon, Inc. (ISi), said that it had demonstrated Z-RAM cells based on Multiple-gate SOI MOSFETS (MUGFETs) with gate lengths down to 50nm and fin widths down to 11nm. Simulations had shown that the basic operational principles are effective on Z-RAM cells with gate lengths down to 12.5nm and fin widths of 3nm. These are the smallest silicon dynamic memory devices ever reported, with the largest programming window, the company said.

“Even such small devices demonstrate a reliable memory effect, and the experimental data presented in the two papers indicates the excellent scalability of our Z-RAM memory devices,” explained Dr. Serguei Okhonin, Chief Scientist at ISi. “Furthermore, the results we demonstrated today are only achievable in floating body architectures. We believe our transistors are not only the smallest silicon dynamic memory devices ever published, but also the best performing. Moreover, at equivalent gate lengths, we demonstrated a several times larger programming window than previously published.”

The Z-RAM devices programming window (margin) was close to 22µA. Z-RAM is a single-transistor DRAM. There is no capacitor or other structure required to form a complete memory cell.