Online information source for semiconductor professionals

Product Briefing Outline: Ferro Electronic Material Systems has introduced a patent-pending self-stopping chemical mechanical planarization (CMP) slurry for Inner Layer Dielectric (ILD) materials. Ferro claims the new slurry provides planarization efficiency of > 95% with an increased over-polish window and eliminates the need for endpoint detection.  ‘SureStop' 8500 offers improved efficiency and uniformity with lower defectivity compared to standard ILD CMP slurries and is now being used to simplify planarization processes that employ reverse mask etchback steps.

Problem: Compared to standard slurries, the company claims that SureStop 8500's features save time and cost by enabling a longer over-polish step, reduced thickness of initial oxide deposition, and elimination of endpoint detection methods.  In addition, the chemical providing the self-stopping characteristic interacts with the wafer surface but not the abrasive ceria particle, thus preventing agglomeration, instability, and scratching.

Solution: SureStop 8500 reduces cycle times and cost by eliminating the multiple lithographic and etching steps of processes using reverse mask etch-back methods at certain layers to reduce step height, which often still requires CMP to fully planarize surfaces.  Again, the over-polish window is increased and the need for endpoint detection is reduced. The slurry effectively removes oxide topography ("Up" oxide) of up to 20,000Å in step height with very little removal of the oxide at the bottom of trenches ("Down" oxide) for high planarization efficiencies throughout the polish.  SureStop 8500 provides fast step height removal of > 5,000 Å/min and low blanket removal rates of < 300 Å/min.  The formulation can be tailored to achieve customers' target removal rates with minimal scratching.

Applications: Inner Layer Dielectric process steps.

Platform: Formulated with optimized Low Defectivity ceria particles and proprietary additives, SureStop 8500 contains chemistries that exhibit topography-dependent polishing behavior and coat the wafer surface to automatically stop polishing when the topography has been removed.  

Availability: July 2007 onwards.

GRAPH 1
The topography-dependent polishing behavior automatically stops polishing when the topography has been removed, enabling a longer over-polish step, reduced thickness of initial oxide deposition, and elimination of endpoint detection methods. 

GRAPH 2
Demonstrates consistent blanket removal rates of < 300 Å/min, providing improved uniformity with lower defectivity compared to standard ILD CMP slurries.