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Home arrow Product Briefings arrow Lithography arrow New Product: Synopsys adds metrology data into OPC modeling
New Product: Synopsys adds metrology data into OPC modeling Print E-mail
Jun 12, 2007 at 03:18 PM
ImageProduct Briefing Outline: Synopsys and Hitachi High-Technologies have developed a seamless link between Hitachi High-Tech's DesignGauge design data measuring system and Synopsys' Proteus optical proximity correction (OPC) solution. Focused on incorporating manufacturing-aware metrology data into design, this common design for manufacturing (DFM) interface assists in the development of faster, more accurate and predictive OPC models for advanced 45nm and beyond technologies. Higher OPC model predictability and reduced model-building cycle times are also achievable. This new functionality is available in the latest production release of Proteus.

Problem: As process geometries continue to shrink to 45nm and beyond, the ability to deliver accurate OPC models that meet the stringent critical-dimension (CD) error budget across the process window plays an increasingly critical role in accelerating mask time-to-yield. Process window models must account for the wide range of process variation and complex two-dimensional (2D) structures. This becomes even more important with the use of multiple resolution enhancement techniques (RETs) for advanced semiconductor manufacturing.

Solution:  Combining leading-edge metrology information from Hitachi High-Tech with Proteus mask-synthesis data sharpens OPC model accuracy and predictability at 45 nanometers and beyond. The automated algorithmic link between DesignGauge, the application system for CD scanning electron microscopy (CD-SEM), and Proteus OPC for pre-processing OPC model building data allows Proteus customers to seamlessly obtain a large sampling of metrology data to account for process variations across the entire process window.

Applications: 45nm node and below.

Platform: Proteus, the core correction-processing engine, combines a hierarchy manager with proprietary, high-speed simulation algorithms. Proteus is typically parallelized across clusters of computers enabling full-chip corrections and compact output files.

Availability: June 2007 onwards.
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