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32nd Edition: Fabless/foundry DFM: 45nm and beyond |
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Dec 20, 2006 at 03:57 PM |
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Peter Rabkin, Michael Hart & Daniel Gitlin, Xilinx, Inc.
ABSTRACT
Leading fabless companies produce designs for cutting edge technologies almost on a par with leading integrated device manufacturers (IDMs). Foundries have evolved from making devices one to three nodes behind IDMs to funding leading-edge R&D and manufacturing chips using the most advanced processes. The key fabless/foundry challenge - how to produce manufacturable designs for cutting edge technology nodes to meet time-to-yield and time-to-volume requirements - is being overcome by an extensive effort broadly called Design For Manufacturability (DFM). Different from IDM requirements, fabless DFM requires addressing a number of additional issues, such as obtaining and utilizing proprietary manufacturing information in the course of the design. That, in turn, requires deep understanding of process-to-design interactions, new process characterization and modeling methodologies, EDA tools, data structures, process models, encryption techniques, etc. Solving these issues and enabling sufficient information flow between design and manufacturing is critical for the overall competitiveness of the fabless/foundry business model.
32nd Edition: Fabless/foundry DFM: 45nm and beyond
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