Zarlink Semiconductor has updated its H-Series analogue RF processes to deliver more dies per wafer and improved yields. The process is available at "Zarlink Analog Foundry" in Swindon, UK.
The foundry's new double poly-silicon H-Series has a full
complement of RF-compatible passive components including low-capacitance
resistors, high-quality capacitors and inductors. Full-power, low-voltage,
low-noise integrated solutions are available for performance analogue applications
up to and higher than 2.5GHz.
"These improvements to our core H-Series wafer
fabrication processes put us ahead of the competition in terms of die
efficiency, design flexibility, consistency in process technology and die
size," said Dr. Peter Osborne, chief technology officer, Zarlink Analog
Foundry. "Revisions to the metallization and via rules enable designers to
shrink the die size and optimise the layout for very high-speed analogue
components."
Zarlink Analog Foundry reports that it is benefiting from
the current round of restructuring. Some restructured foundries have caused
capacity constraints for companies requiring smaller wafer runs and
hard-to-manufacture specialty chips, as well as continuity-of-supply concerns.
The H-Series processes were first designed for analog RF
components used in signal processing applications. The fully qualified
improvements to H-Series processes boost the performance and lower the system
cost of high-speed, high-performance consumer products and wireless
applications.
All the H-Series process technologies are available with
full design support kits incorporating advanced component models. Zarlink's
H-Series technology is also available for low-cost prototyping using a
multi-project wafer processing service. By Dr Mike Cooke
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