By Laura Pressley, Ph.D., Spansion, LLC, Austin, Texas, USA, & Lisa Cheung, KLA-Tencor, Milpitas, Ca, USA

ABSTRACT

Backside and edge/bevel defectivity can negatively impact semiconductor manufacturing tool productivity and sort yields. The importance of a backside and edge/bevel defectivity monitoring program is discussed along with the challenges that will become apparent for 300-mm fabs and for higher technology nodes of 90 nm, 65 nm and below. Multiple examples of backside defectivity issues that caused productivity and yield loses in various IC manufacturing fabs are reviewed. How these defects can detrimentally impact starting Si substrates, photolithography patterning, batch processes such as cleans and vertical furnaces, and CMP processes are discussed.