Solution: Wafers with a previously deposited plasma-enhanced chemical vapor deposition (PECVD) film are introduced into SOLA, where they are exposed to a uniform UV lamp source to modify the film properties. At the same time, the wafer is heated to a uniform temperature, typically 450 C or less. With HSN films, SOLA's UV radiation promotes bond rearrangement and volume contraction to generate the higher stress levels required to enhance device performance. With porous low-k films, UV radiation facilitates removal of porogen, and mechanically strengthens the dielectric film for further processing. SOLA's proprietary lamp assembly includes dual linear lamps and custom optical reflectors optimally arranged to provide uniform UV light exposure on a 300mm wafer. The arrangement minimizes infrared (IR) light that causes undesirable wafer heating and non-homogeneous treatment results, according to the company. SOLA's multi-station sequential treatment (MSST) architecture results in both high throughput and a treatment non-uniformity deviation of less than 2 percent.

Applications: Transistor-level high-stress nitrides (HSN) and interconnect-level dense or porous low-k dielectrics.

Platform: The SOLA platform incorporates proprietary purge hardware that minimizes clean requirements during wafer processing. More than 100 porogen-containing wafers may be processed in SOLA before a chamber clean is required, a purge efficacy of as much as 20 times higher than the industry average is claimed.

Availability: December 2005 onwards