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Editor's Blog
The blog is written by Semiconductor Fabtech's Editor-in-Chief, Mark Osborne. He has been covering the semiconductor industry for over ten years. This area is intended to provide insight into topical stories of the time in a more informal manner.

Toggling at Micron Technology pays off! Print E-mail
Sep 30, 2005 at 05:30 PM
Micron Technology has struggled to wean its self off producing nothing more than commodity DRAM in the last 18 months. However, yesterday the Boise Idaho, based chip manufacturer caught many financial analysts by surprise by producing a clear profit of the quarter instead of an estimated $100 million loss.

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Silence of the (Intel) lambs Print E-mail
Sep 30, 2005 at 03:07 PM
A story posted by Mike Magee at theenquirer.net jogged my memory concerning the exact same thing several years ago. Mike claims its 2001, so I will go with flow on that one. Basically "Editor Magee" has requested confirmation over what microprocessors Intel now uses within its fabs to handle all of the production manufacturing execution systems.Write Comment (0 comments)
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SMIC exonerates tool suppliers for fab ramp deficiencies Print E-mail
Sep 29, 2005 at 08:35 PM
News stories have been circulating all week about SMIC blaming its shortfall in revenue projections due to late delivery of processing tools. I found that highly unlikely as the foundry purchases the majority of tools from major equipment suppliers who all can turn around orders within a quarter.

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Is Samsung playing poker? Print E-mail
Sep 29, 2005 at 06:01 PM
Samsung has announced a $33 billion dollar capex plan through to 2012 that includes eight 300mm fabs and one new nano-capable R&D facility. That's a big hand dealt at a time when 300mm fabs announcements are few and far between.

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AMD waiting for sSOI to become manufacturable: New supplier JDP could resolve issues! Print E-mail
Sep 27, 2005 at 05:49 PM
SOI substrates have been proved in volume manufacturing at chip manufacturers such as IBM, Freescale and AMD. To further improve the inherent performance and/or low power consumption properties of SOI wafers, Soitec has been developing a layer-transfer strained SOI substrate that uses a silicon germanium alloy layer to add further carrier mobility.Write Comment (0 comments)
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Israel cheaper than most places to run a fab, so what’s holding up Intel? Print E-mail
Sep 27, 2005 at 04:09 PM
Intel is still keeping quite over whether it will or will not build a new 300mm fab in Israel. The chip giant teased us recently with capacity expansions at two 200mm fabs in North America, that also followed on from a new 300mm fab announced for Arizona.Write Comment (0 comments)
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Sony to get rid of corporate silos: sounds painful! Print E-mail
Sep 22, 2005 at 07:34 PM
Painful indeed as Sony Corp outlined its new direction in the coming years, just as the last new direction comes to an end. Jobs and factories will go. Jobs are going to the tune of 10,000 (6,000 overseas & 4,000 in Japan) as well as cutting manufacturing sites by 11, leaving Sony with 54 worldwide. Sony stated that they had identified 15 business categories that would be downsizing, making alliances with other companies or will be disposed of. The company is re-organising itself in an effort to create about 5 percent operating profit per annum.Write Comment (0 comments)
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Intel goes ultra low power & ultra low detail Print E-mail
Sep 21, 2005 at 04:06 PM
Intel Corporation is well known to journalist for its minimalist information on just about everything it does as a company. But in the field of process technology it reigns supreme in telling us just about zilch!Write Comment (0 comments)
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Towering Inferno: buddies say nice things about each other Print E-mail
Sep 19, 2005 at 07:10 PM
Two buddies got together in very brief press release today that said SanDisk relies on Tower Semiconductor and Tower says it is ready willing and able for SanDisk to rely on them.Write Comment (0 comments)
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Is TI’s high k on the highway? Print E-mail
Sep 19, 2005 at 07:09 PM
Texas Instruments is to migrate "SmartReflex" leakage power technologies to 65nm devices, the company said in a press statement. Some of the technology was first introduced for some of TI's 90nm devices in the last 18 months and was positioned then as a work around for leakage issues experienced at that node.Write Comment (0 comments)
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