The Chip Shots blog channels the observations of Fabtech's Senior Contributing Editor from -- U.S., Tom Cheyney, a 20-year veteran of semiconductor and advanced micro/nanoelectronics trade journalism. Tom was editor in chief of MICRO (the original home of Chip Shots) until it ceased publication in July 2006; he also serves as Senior Contributing Editor for Small Times. Tom calls Los Angeles home.
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Mar 19, 2008 at 11:22 AM |
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If you look at the Websites for Lam Research and SEZ, you'd hardly know the two companies are now one, despite the successful closing of the tender-offer deal last week.Write Comment (0 comments) |
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Mar 17, 2008 at 01:17 PM |
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GE Global Research received a decent amount of coverage last week from its press release touting the "successful demonstration of the world's first roll-to-roll manufactured organic light-emitting diode (OLED) lighting devices" at the unit's Niskayuna, NY, R&D center.Write Comment (1 comments) |
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Mar 14, 2008 at 03:17 PM |
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The Edenvale area of San Jose is becoming a little hotbed of photovoltaic activity, but the latest company set to move there remains in stealth-mode information lockdown.Write Comment (0 comments) |
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Mar 11, 2008 at 12:54 PM |
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As one of the premier purveyors of MEMS fabricated on thick silicon-on-insulator (SOI) wafers, Tronics Microsystems knows a thing or two about the metrology challenges involved with those fat, bonded substrates.Write Comment (0 comments) |
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Mar 06, 2008 at 08:30 AM |
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When Micron announces fab plans, don't hold your breath.Write Comment (0 comments) |
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Mar 05, 2008 at 08:30 AM |
While the front end of line, lithography, and process integration areas often get the lion's share of attention in the advanced semiconductor manufacturing community, the back end of line presents its own prickly challenges and potential for bottlenecking.
The new edition of the ITRS lists three grand challenges associated with the interconnect realm: In the near term (through 2015, or up to but not including 22 nm), new materials will be needed to meet the specs for both high conductivity and low dielectric permittivity and the structures, processes, and aforementioned new materials must be engineered to be manufacturable.Write Comment (0 comments) |
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Mar 04, 2008 at 03:07 PM |
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A couple of weeks ago, when I went to download a copy of the executive summary from the latest (AKA 2007) edition of the International Technology Roadmap for Semiconductors, I noticed that the entire document was still not posted to the site.Write Comment (0 comments) |
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Mar 03, 2008 at 08:45 AM |
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Applied Materials claims it has a great lithography-enabling technology with its self-aligned double patterning (SADP) approach.Write Comment (1 comments) |
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Feb 27, 2008 at 07:30 AM |
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Mike Lercel, director of Sematech's lithography efforts, couldn't tell me about the news of the consortium's purchase of Molecular Imprints' new, improved Imprio 300 step-und-flash imprint litho system and planned delivery to Albany this summer when I spoke with him Monday---but he would have liked to.Write Comment (5 comments) |
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Feb 26, 2008 at 08:15 AM |
Among the faithful congregating at the annual SPIE Advanced Lithography event in San Jose this week, one gentleman's out-of-control throwback hair style is momentarily en vogue, an eerie follicular facsimile of the big bad 'do sported by Javier Bardem in his Oscar-winning supporting actor role as stone-cold killer Anton Chigurh in "No Country for Old Men." But the Coen brothers would be hard pressed to script anything as dramatically and technically challenging as making EUV lithography a production-worthy technology in the next few years.
Yet plenary presentations by two EUVL proponents, Micron president/COO Mark Durcan and ASML's exec VP Martin van den Brink, both provided reasons for a few photons of optimism for supporters of the next-gen litho tech currently championed by many in the industry.
Durcan said that despite the hard challenges of EUVL, he is "a big believer" in the technology, although "we're not gonna hit 2009, I don't think.Write Comment (3 comments) |
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