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Lithography Product Briefs   RSS Feed
Product Briefing Outline: Dow Corning Electronics' Silicon Lithography Solutions group has now made available its XR-1541 E-Beam Resists, designed to enable the development of next-generation, direct-write lithography processing technology. This  Read More
Product Briefing Outline: TSMC has introduced a new Unified Design For Manufacturing (UDFM) architecture that targets 32nm process technology and smaller geometries and improves yields, lowers design costs and accelerates  Read More
Product Briefing Outline: Takumi Technology Corporation today announced the availability of its new layout optimization tool - the Takumi Enhance-RO - for automated enforcement of recommended rules and critical area  Read More
Lithography
The Lithography section is dedicated to all aspects of this field and those processes and technologies closely associated with the lithography process. All aspects of this critical step in leading edge IC fabrication are included. Articles are commissioned from experts in their fields that include IC manufacturers, R&D centres, capital equipment companies and Universities from around the world.

9th Edition: Simulation for DUV Lithography Print E-mail
Nov 04, 1998 at 12:56 PM

Wolfgang Henke, Fraunhofer Institut Siliziumtechnologie, Itsehoe, Germany

ABSTRACT

Deep-UV (DUV) lithography using 248 and 193 nm exposure wavelength will be the microlithography technology of choice for the manufacture of advanced memory and logic semiconductor devices for the next years. For many companies DUV-lithography with 248 nm sources is becoming mainstream technology. To support introduction of this technology into wafer fabs and to ramp up or improve production yield, the use of simulation tools is a valuable means. Although concepts are, in principle, similar to traditional i-line or g-line lithography, exposure technology and imaging mechanisms of DUV resists are substantially different. The payoff from introducing DUV lithography will be the ability to manufacture devices using optical lithography for device generations having minimum dimensions
of 0.12 μm or even below. This article will review some of the key issues to be tackled when applying simulation tools in current technology development. Issues concerning influence of the stepper or scanner lens, resist materials and resolution enhancement are discussed.

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9th Edition: Sub-Wavelength Lithography Using OPC Print E-mail
Nov 04, 1998 at 11:42 AM

Frank M. Schellenberg, Mentor Graphics, Inc., Wilsonville, OR, USA

ABSTRACT 

For the progression of Moore's Law to continue, subwavelength lithography will be routinely required. In this situation, lithographic pattern fidelity can deteriorate dramatically. Correction of these effects and the restoration of pattern fidelity can be accomplished by pre-compensation of the IC design through the application of OPC technology. This originally stood for "Optical proximity Correction", but now more generally represents "Optical and Process Correction". A range of OPC styles, both rules based and model based, are possible. The various styles of OPC, suitable insertion points and techniques for manufacturable OPC are discussed.

 

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9th Edition: 193 nm Microlithography and DUV Light Source Design Print E-mail
Nov 04, 1998 at 11:40 AM

Bernd Nikolaus, Olivier Semprez, Gerry Blumenstock, Palash Das, Cymer, Inc., San Diego, CA, USA

ABSTRACT 

While 248 nm KrF-excimer lasers have successfully enabled the sub-quarter micron technology, the semiconductor industry is preparing for the next step in optical lithography using 193 nm ArF lasers. Optics and toolmakers are facing new challenges at 193 nm that were hitherto not experienced at 248 nm. Some of these challenges are optical damage of 193 nm coatings and materials, and the necessity to use large calcium fluoride lenses. Cymer, as the leading supplier of 248 nm illumination source, is exploring new design concepts and aggressively shifting the standards of ArF lasers to match the performance, cost and lifetime requirements of next generation 193 nm exposure tools.

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9th Edition: The Development of Step and Scan Print E-mail
Nov 04, 1998 at 11:38 AM

Dr. Harry Sewell, SVG Lithography Systems, Inc., Wilton, CT, USA

The demand for high-performance microprocessors and memory chips is challenging manufacturers to deliver high-clock-speed devices. The yield achieved with these high-value devices is a significant factor in the economics of semiconductor manufacture.


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9th Edition: Metrology Issues in the Age of Next Generation Lithography Print E-mail
Nov 04, 1998 at 11:36 AM

S. A. Rizvi, Photronics Inc., Milpitas, CA, USA

ABSTRACT 

The role of metrology with the advent of next generation lithography is going to be even more crucial than ever before. One reason is of course the high degree of tolerance demanded of the continued shrinking features; but then there are other factors that make the new metrology even more challenging. Features made of new materials may respond differently to the measuring instruments ; this may especially be true in the case of masks that are made for different types of lithographic systems. Physics involved in different types of measurement techniques can also provide outputs that may be difficult to correlate. Most importantly it is the lack of a sound statistical basis for handling nano and sub-nano metrology that presents potential difficulties in coming years. This paper explores areas of metrology that, though ignorable in the past, are beginning to play a significant role when required to support the New Generation Lithography.

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