ASM International has publicly announced that it has received an unsolicited offer for its ALD and PECVD product ranges from Applied Materials who is offering between $400 million and $500 million for the two businesses. 

Replisaurus Technologies, has acquired S.E.T. SAS to establish a production site for its proprietary ‘ElectroChemical Pattern Replication’ (ECPR) technology, used for TSV and other IC packaging integration schemes. S.E.T. Smart Equipment Technology is the former device bonder division of SUSS MicroTec and is based in France. 

First Nano has shipped one of its SiGe CVD systems to CEA Grenoble, France. The CEA will use the system in its Silicon Nanoelectronics Photonics and Structures (SiNaPs) laboratory for aiding research into low-dimensional silicon-based nanostructures.

Nantero is placing its ‘CMOS-friendly’ CNT process modules at SVTC’s two development fabs in the U.S. to allow for wider collaboration with potential licensees of Nantero’s technology and the ultimate aim of full commercialization. 

In joint development work, IMEC and AIXTRON have said that they have successfully deposited crack-free AlGaN/GaN structures onto 200mm Si(111) wafers. This is the first such demonstration, according to the development team. The aim is to reach full fabrication of low-cost GaN power devices for high-efficiency/high-power systems beyond the silicon limits. 

TSMC, the world’s largest semiconductor foundry, has joined the Interoperable PDK Libraries (IPL) Alliance. The Alliance aims to standardize process design kits (PDKs - sets of foundry-verified data files for analog and mixed signal design flow) to create uniformity in design flows for customers across the board. Specialized PDKs for individual EDA vendors and tools can lead to uniformity problems further down the line when multiple vendors and customers are involved. 

IM Flash Technologies (IMFT), the joint venture NAND flash manufacturing partnership between Intel Corp. and Micron Technology, has produced working samples of its 34nm 32Gb multi-level cell NAND flash device, which fits into a standard 48-lead thin small-outline package (TSOP). The 172mm² die produce approximately 1.6 terabytes of NAND flash memory per 300mm wafer, according to the companies. 

Qcept Technologies, Inc., the wafer inspection systems company, and CEA-Leti, the micro- and nanotechnology research organization, have signed an agreement that will see them collaborate on advanced semiconductor process development.  High-k and low-k dielectrics, ALD, and FUSI metal gates are among the technologies being researched and examined under the new agreement. 

A major semiconductor manufacturer has selected a single wafer cleaning system dubbed ‘ORION’ from FSI International, which has yet to be officially announced. The tool will be used for 32nm BEOL cleaning processes that specifically handle low-k materials.